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Announcement
January 20, 2006
ERG comes through with DSP Filter, RTL design consultant.
Embedded Resource Group was successful engaging a DSP ASIC Design Engineer for the architecture, design and implementation of a 802.11 based wireless chipset at a large semicondutor client. The consultant needed a strong background with direct Filter Design or FIR (finite impulse response) filter design experience, Front End Design, RTL, Verilog, and VCS.
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